//+---------------------------------------------------------------------------
//|
//| Arria II GX FPGA Development Kit
//| Dev Kit Readme v12.1.0
//|
//+---------------------------------------------------------------------------
February 2013

This readme.txt file accompanies the Arria II GX FPGA Development Kit.

Device target: EP2AGX125EF35C4N
ACDS Release: 12.1 build 177
Board Revision: Rev C

//=============================
//    System Requirements
//=============================

Software Requirements
========================
Demo appliations require the installation of Quartus II v12.1 or later and are
supported on the following operating systems:
   Windows 7 64-bit   
   Windows XP SP2 32-bit
   Windows XP SP2 64-bit
   

Hardware Requirements
========================
   Pentium III or later for Windows
   Color display capable of 1024 X 768 pixel resolution
   One or more of the following I/O ports:
   -  USB port (if using Windows7, Windows XP or Windows 2000) for 
      USB-Blaster(TM) or MasterBlaster(TM) 
      communications cables, or APU programming unit
   -  Ethernet port with DHCP (for Board Update Portal)

//=============================
//       Release Notes
//=============================

(1) Boards built after July 2010 transitioned from engineering silicon (ES)
    devices to production Silicon devices from Altera.  These devices can be
    programmed using the same sof files. 

(2) Boards built after July 2010 transitioned from an end-of-life (EOL) Intel 
    dual-die 512-Mb flash PC48F4400P0VB00 to Intel/Numonyx single-die flash
    PC28F512P30BF.  This makes older versions of the Board Update Portal, the 
    Board Test System's bts_config (Flash/SRAM/LCD/UserIO design), and the
    factory recovery binaries to not work correctly (i.e. random test & increment
	test at bts_config's flash tab).  At this time the default
    files for these designs switched to the single-die flash.  For customers 
    with boards built before this date there are new sub-directories called
    "dual_die_flash" to support these designs for older boards.  

    For more information see the User Guide and Reference Manual.  Flash is 
    U23.

(3) In the Board Test System GUI on the HSMC tab the PMA button allows 
    entering the full range of values for VOD, Pre-Emphasis, RX Equalization, 
    and DC Gain. The user should review the Arria II GX Transceiver User Guide
    for restrictions on this range. For example, Pre-Emphasis has a 5 bit bus 
    for a range of 0-31 allowed by the BTS GUI, however the transceiver user 
    guide restricts this range from 0-3, with values 4-31 listed as NA.

(4) If the BoardTestSystem.exe GUI does not launch or shows a warning window
    saying "Quartus 12.1 is not the active version..." try setting the 
    $QUARTUS_ROOTDIR environment variable to your active 12.1 installation
    by starting the 32-bit application.  The 64-bit application may not set 
    this variable correctly.

(5) Board BOM is updated. Refer to board_design_files/arriaIIGX_2agx125_fpga/bom
    folder for the latest BOM revision 0F.
	
(6) Quartus II v12.1 Serial Flash Loader PS mode in MAX II system controller 
	reference design fails to load factory reference design when board power is
	cycled. 
	Solution to this problem can be found at 
	http://www.altera.com/support/kdb/solutions/rd01202013_282.html
	Download patch version 0.21 and install in your Quartus II v12.1 and recompile
	the max2 design.
	Permanent fix will be included in Quartus II v12.1sp1 release.